COMP60621 Designing for Parallelism and Future Multi-core Computing syllabus 2013-2014
Dual-core and Quad-core processors are now becoming commonplace as circuit limits are reached which prevent further performance gains from simple clock-speed increases. Major industrial projections expect processors with hundreds of cores within a few years. But, current hardware architectural approaches are not applicable to the scale of these future processors. In addition, programming techniques, required to write general purpose parallel programs to make effective use of these systems, are regarded as inadequate. These are therefore very active research areas and there are a number of different but inter-related directions being explored. The purpose of this course unit is to study that research by a combination of directed reading and practical experimentation with state-of-the art multi-core hardware, simulators of research systems and novel language implementations.
The unit aims to study the technological issues which will determine both the future hardware architecture and the programming techniques which will be necessary to extract performance from multi-core processors. It will examine the limitations of current approaches and study in detail those areas of research which are most likely to provide solutions.
Learning and Teaching Processes
Introductory material will be provided by a small number of traditional lectures. The majority of the research material will be covered by directed reading followed by small group presentation and discussion. Practical work will take the form of small group projects where a student will be expected to investigate a particular topic in depth by experiment.
Feedback methodsInformal feedback during the course, plus one-to-one dedicated time to provide feedback on the lab exercises and how to improve answers for the exam
- Lectures (35 hours)
- Analytical skills
- Group/team working
- Oral communication
- Problem solving
- Written communication
On successful completion of this unit, a student will be able to:
Learning outcomes are detailed on the COMP60621 course unit syllabus page on the School of Computer Science's website for current students.
|Principles and practices of interconnection networks||Dally, William J.||1281011584||Morgan Kaufmann Publishers||c2004.|
|Java concurrency in practice||Goetz, Brian. author.||0321349601||Addison-Wesley||2006|
|Transactional memory||Harris, Tim||1608452352||Morgan & Claypool||2010|
|Computer architecture : a quantitative approach /||Hennessy, John L.||9780123838735||Morgan Kaufmann/Elsevier||2014.|
|The art of multiprocessor programming /||Herlihy, Maurice.||0123977959 (e-book)||Morgan Kaufmann||c2012.|
|The memory system : you can't avoid it, you can't ignore it, you can't fake it /||Jacob, Bruce.||1598295888||Morgan & Claypool Publishers||©2009.|
|Memory systems : cache, DRAM, disk||Jacob, Bruce. author.||null||Morgan Kaufmann||2008|
|On-chip networks||Enright Jerger, Natalie D.||9781598295849||Morgan & Claypool Publishers||c2009.|
|Computer architecture techniques for power-efficiency [electronic resource] /||Kaxiras, Stefanos.||9781598292084 (pbk.)||Morgan & Claypool||c2008.|
|On-chip communication architectures : system on chip interconnect||Pasricha, Sudeep.||9780080558288||Elsevier / Morgan Kaufmann Publishers||©2008|
Course unit materials
Links to course unit teaching materials can be found on the School of Computer Science website for current students.