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This is an archived syllabus from 2013-2014

COMP60621 Designing for Parallelism and Future Multi-core Computing syllabus 2013-2014

COMP60621 Designing for Parallelism and Future Multi-core Computing

Level 6
Credits: 15
Enrolled students: 17

Course leader: Mikel Lujan


Additional staff: view all staff

Assessment methods

  • 50% Written exam
  • 50% Coursework
Timetable
SemesterEventLocationDayTimeGroup
Sem 1 P2 Lecture 2.15 Thu 09:00 - 09:00 -
Themes to which this unit belongs
  • Parallel Computing in the Multi-core Era

Overview

Dual-core and Quad-core processors are now becoming commonplace as circuit limits are reached which prevent further performance gains from simple clock-speed increases. Major industrial projections expect processors with hundreds of cores within a few years. But, current hardware architectural approaches are not applicable to the scale of these future processors. In addition, programming techniques, required to write general purpose parallel programs to make effective use of these systems, are regarded as inadequate. These are therefore very active research areas and there are a number of different but inter-related directions being explored. The purpose of this course unit is to study that research by a combination of directed reading and practical experimentation with state-of-the art multi-core hardware, simulators of research systems and novel language implementations.

Aims

The unit aims to study the technological issues which will determine both the future hardware architecture and the programming techniques which will be necessary to extract performance from multi-core processors. It will examine the limitations of current approaches and study in detail those areas of research which are most likely to provide solutions.

Learning and Teaching Processes

Introductory material will be provided by a small number of traditional lectures. The majority of the research material will be covered by directed reading followed by small group presentation and discussion. Practical work will take the form of small group projects where a student will be expected to investigate a particular topic in depth by experiment.

Feedback methods

Informal feedback during the course, plus one-to-one dedicated time to provide feedback on the lab exercises and how to improve answers for the exam

Study hours

  • Lectures (35 hours)

Employability skills

  • Analytical skills
  • Group/team working
  • Innovation/creativity
  • Leadership
  • Oral communication
  • Problem solving
  • Research
  • Written communication

Learning outcomes

On successful completion of this unit, a student will be able to:

Learning outcomes are detailed on the COMP60621 course unit syllabus page on the School of Computer Science's website for current students.

Reading list

TitleAuthorISBNPublisherYear
Principles and practices of interconnection networksDally, William J.1281011584Morgan Kaufmann Publishersc2004.
Java concurrency in practice Goetz, Brian. author.0321349601Addison-Wesley2006
Transactional memory Harris, Tim1608452352Morgan & Claypool2010
Computer architecture : a quantitative approach /Hennessy, John L.9780123838735Morgan Kaufmann/Elsevier2014.
The art of multiprocessor programming /Herlihy, Maurice.0123977959 (e-book)Morgan Kaufmannc2012.
The memory system : you can't avoid it, you can't ignore it, you can't fake it /Jacob, Bruce.1598295888Morgan & Claypool Publishers©2009.
Memory systems : cache, DRAM, disk Jacob, Bruce. author.nullMorgan Kaufmann2008
On-chip networks Enright Jerger, Natalie D.9781598295849Morgan & Claypool Publishersc2009.
Computer architecture techniques for power-efficiency [electronic resource] /Kaxiras, Stefanos.9781598292084 (pbk.)Morgan & Claypoolc2008.
On-chip communication architectures : system on chip interconnect Pasricha, Sudeep.9780080558288Elsevier / Morgan Kaufmann Publishers©2008

Additional notes

Course unit materials

Links to course unit teaching materials can be found on the School of Computer Science website for current students.