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COMP30202: From Transistors to Systems-on-Chip (2009-2010)

This is an archived syllabus from 2009-2010

From Transistors to Systems-on-Chip
Level: 3
Credit rating: 10
Pre-requisites: COMP10211 or CS1211
Co-requisites: No Co-requisites
Duration: 11 weeks in semester 2
Lectures: 22
Lecturers: Doug Edwards
Course lecturer: Doug Edwards

Additional staff: view all staff
Timetable
SemesterEventLocationDayTimeGroup
Sem 2 w19-26,30-33 Lecture LF17 Tue 10:00 - 12:00 -
Assessment Breakdown
Exam: 100%
Coursework: 0%
Lab: 0%
Degrees for which this unit is optional
  • Artificial Intelligence BSc (Hons)

Aims

CMOS technology underpins the majority of leading edge digital commercial applications regardless of whether the design is aimed at high performance, low power or area efficiency. The aim of this course is to give students a thorough overview of the capabilities of this powerful and flexible technology, illustrating this with the memory, arithmetic, register and bus blocks used in today's processors. This should enable students to design circuits with confidence and to understand low-level and high-level design issues permitting sound design choices to be made.

Learning Outcomes

A student completing this course unit should:
Understand different static and dynamic CMOS logic family styles and their different characteristics. (A and B)
Have the skill to design and implement working digital circuits. (B)
Have the ability to perform performance, power, capacitance and resistance estimations. (B)
Be able to identify the different high level components required by current processors on a chip and understand the composition of these blocks. (A)
Understand the composition of high level blocks used in current processors.(A)
Able to evaluate performance/power/area trade-offs that occur in systems. (B)

Assessment of Learning outcomes

Learning outcomes (1) to (6) are assessed by examination.

Contribution to Programme Learning Outcomes

A2, A3, A5, B1, B2, B3

Syllabus

MOS Technology (1)


Transistors - NMOS, PMOS, characteristics, threshold voltage, body effect.

CMOS Design Styles (5)


Conventional static logic, transmission gates and networks, pseudo NMOS, dynamic logic, clocked logic, single-ended pass transistor logic (SPL), domino, differential, cascade voltage switch logic.

Gate Characterisation (2)


Simulation , performance estimation.

Power Dissipation (2)


Contributory factors, design style comparison, low power operation.

Memory Systems (5)


Memory types, memory cells -registers, SRAM, DRAM, SDRAM, EEPROM, cache, sense amplifiers, system design, register files.

Execute Units (4)


High speed adders - carry look ahead, carry skip, fast multiplication - Booth's algorithm, carry propagation, systolic array.

Interconnections (2)


On-chip bus architectures, timing issues.

Mixed Mode Systems (1)

Reading List

Core Text
Title: CMOS VLSI design: a circuits and systems perspective (3rd edition)
Author: Weste, Neil H.E. and David Harris
ISBN: 0321269772
Publisher: Pearson Higher Education
Edition: 3rd
Year: 2004
This book is a good investment for the course and beyond.