COMP60621 Designing for Parallelism and Future Multi-core Computing syllabus 2015-2016
Dual-core and Quad-core processors are now becoming commonplace as circuit limits are reached which prevent further performance gains from simple clock-speed increases. Major industrial projections expect processors with hundreds of cores within a few years. But, current hardware architectural approaches are not applicable to the scale of these future processors. In addition, programming techniques, required to write general purpose parallel programs to make effective use of these systems, are regarded as inadequate. These are therefore very active research areas and there are a number of different but inter-related directions being explored. The purpose of this course unit is to study that research by a combination of directed reading and practical experimentation with state-of-the art multi-core hardware, simulators of research systems and novel language implementations.
The unit aims to study the technological issues which will determine both the future hardware architecture and the programming techniques which will be necessary to extract performance from multi-core processors. It will examine the limitations of current approaches and study in detail those areas of research which are most likely to provide solutions.
Learning and Teaching Processes
Introductory material will be provided by a small number of traditional lectures. The majority of the research material will be covered by directed reading followed by small group presentation and discussion. Practical work will take the form of small group projects where a student will be expected to investigate a particular topic in depth by experiment.
Feedback methodsInformal feedback during the course, plus one-to-one dedicated time to provide feedback on the lab exercises and how to improve answers for the exam
- Lectures (35 hours)
- Analytical skills
- Group/team working
- Oral communication
- Problem solving
- Written communication
|Programme outcome||Unit learning outcomes||Assessment|
|G1||Understand the limitations of current multi-core computing. Have detailed knowledge of those areas of research that are intended to address both the hardware architecture and programming approaches which will be needed to develop future high performance multi-core systems.|
|G1 G2||Be able to analyse current research in the multi-core area with the ability to judge whether they are promising in the context of the technological limitations which constrain progress.|
|G1 G2 G3||Be able to access the parallel potential of multi-core systems both by the use of real hardware and simulation. Be able to develop parallel programs for multi-core systems using novel programming approaches.|
|G2 G3 G4||Be able to evaluate research by literature study. Be able to perform research level presentations. Small group working skills.|
|Computer architecture: a quantitative approach (5th edition)||Hennessy, John L. and David A. Patterson||9780123838728||Morgan Kaufmann||2011||✔|
|On-chip communication architectures: system on chip interconnect||Pasricha, Sudeep and Nikil Dutt||9780123738929||Morgan Kaufmann||2008||✖|
|Computer architecture techniques for power-efficiency||Kaxiras, Stefanos and Margaret Martonosi||9781598292084||Morgan & Claypool||2008||✖|
|Java concurrency in practice||Goetz, Brian et al||9780321349606||Addison Wesley||2015||✖|
|Memory systems: cache, DRAM, disk||Jacob, Bruce and Spencer W. Ng and David T. Wang||9780123797513||Morgan Kaufmann||2008||✖|
|Principles and practices of interconnection networks||Dally, William James and Brian Patrick Towles||9780122007514||Morgan Kaufmann||2004||✖|
|Transactional memory (2nd edition)||Harris, Tim and James Larus and Raji Rajwar||9781608452354||Morgan & Claypool||2010||✖|
|Memory system: you can't avoid it, you can't ignore it, you can't fake it||Jacob, Bruce||9781598295870||Morgan & Claypool||2008||✖|
|Art of multiprocessor programming (revised 1st edition)||Herlihy, Maurice and Nir Shavit||9780123973375||Morgan Kaufmann||2012||✖|
|On-chip networks||Jerger, Natalie D. Enright and Li-Shiuan Peh||9781598295849||Morgan & Claypool||2009||✖|
Course unit materials
Links to course unit teaching materials can be found on the School of Computer Science website for current students.