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COMP25212 System Architecture syllabus 2017-2018

COMP25212 materials

COMP25212 System Architecture

Level 2
Credits: 10
Enrolled students: 122

Course leader: Javier Navaridas-Palma


Additional staff: view all staff

Requisites

  • Pre-Requisite (Compulsory): COMP15111
  • Pre-Requisite (Compulsory): COMP25111

Additional requirements

  • Students who are not from the School of Computer Science must have permission from both Computer Science and their home School to enrol.

Assessment methods

  • 80% Written exam
  • 20% Practical skills assessment
Timetable
SemesterEventLocationDayTimeGroup
Sem 2 Lecture Uni Place TH A Wed 09:00 - 10:00 -
Sem 2 Lecture 1.1 Fri 14:00 - 15:00 -
Sem 2 B Lab LF31 + LF17 Thu 09:00 - 11:00 F
Sem 2 B Lab LF31 + LF17 Thu 11:00 - 13:00 H
Themes to which this unit belongs
  • Computer Architecture

Overview

The basic architecture of computer systems has been covered in first year course units which detailed both the instruction set architecture and the micro-architecture (hardware structure) of simple processors. Although these principle underlie the vast majority of modern computers, there are a wide range of both hardware and software techniques which are employed to increase the performance, reliability and flexibility of systems.

Aims

The aims of this course are to introduce the most important system architecture approaches. To give a wider understanding of how real systems operate and, from that understanding, the ability to optimise their use.

Syllabus

Introduction

The motivation behind advanced architectural techniques.

Caching

The need to overcome latency. Caching as a principle, examples of caching in practice. Processor cache structure and operation.

Pipelining

Principles of pipelining. Implementation of a processor pipeline and its properties. Pipelining requirements and limitations. Additional support for pipelining.

Multi-Threading

Basic multi-threading principles. Processor support for multi-threading. Simultaneous multi-threading.

Multi-Core

Motivation for multi-core. Possible multi-core structures. Cache coherence.

File System Support

Implementation of file systems. RAID

Virtual Machines

Motivation for Virtual Machines. Language Virtual Machines. System Virtual Machines. Virtual Machine implementation. Binary Translation

Study hours

  • Assessment written exam (2 hours)
  • Lectures (22 hours)
  • Practical classes & workshops (12 hours)

Learning outcomes

Programme outcomeUnit learning outcomesAssessment
A3 B1 B2 B3 C6Have knowledge and understanding of techniques which are employed in modern processors to increase their performance, reliability and flexibility.
  • Examination
  • Lab assessment
A3 B1 B2 B3 C6Have detailed knowledge and understanding of the following architectural principle: Caching.
  • Lab assessment
  • Examination
A3 B1 B2 B3 C6Have detailed knowledge and understanding of the following architectural principle: Pipelining.
  • Lab assessment
  • Examination
A3 B1 B2 B3 C6Have detailed knowledge and understanding of the following architectural principles: Multi-Threading & Multi-Core.
  • Lab assessment
  • Examination
A3 B1 B2 B3 C6Have detailed knowledge and understanding of the following architectural principles: File System Support (RAID).
  • Lab assessment
  • Examination
A3 B1 B2 B3 C6Have detailed knowledge and understanding of the following architectural principles: Virtual Machines.
  • Examination
  • Lab assessment
A3 B1 B2 B3 C6Have the ability to model architectural principles via simulation.
  • Examination
  • Lab assessment

Reading list

TitleAuthorISBNPublisherYearCore
Virtual machines: versatile platforms for systems and processesSmith, Jim and Ravi Nair9781558609105Morgan Kaufmann2005
Computer organization and design: the hardware/software interface (5th edition)Patterson, David A. and John L. Hennessy9780124077263Elsevier2014

Additional notes

Course unit materials

Links to course unit teaching materials can be found on the School of Computer Science website for current students.