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COMP32211 Implementing System-on-Chip Designs syllabus 2017-2018

COMP32211 materials

COMP32211 Implementing System-on-Chip Designs

Level 3
Credits: 10
Enrolled students: 6

Course leader: Jim Garside


Additional staff: view all staff

Requisites

  • Pre-Requisite (Compulsory): COMP22111

Additional requirements

  • Students who are not from the School of Computer Science must have permission from both Computer Science and their home School to enrol.

Assessment methods

  • 50% Written exam
  • 50% Practical skills assessment
Timetable
SemesterEventLocationDayTimeGroup
Sem 1 w1 Lecture G36 Tue 13:00 - 15:00 -
Sem 1 w2-4,7-12 Lecture G36 Tue 13:00 - 14:00 -
Sem 1 w2-4,7-12 Lab Toot 0 Tue 14:00 - 15:00 -
Sem 1 w5 Lab Toot 0 Tue 13:00 - 15:00 -
Themes to which this unit belongs
  • System-on-Chip

Overview

The ultimate goal of any hardware design is a physical implementation.  This course covers the translation of algorithms into a realisable hardware design. The practical part of the course develops higher level models into Verilog HDL and thence to an FPGA.  In the lectures the process of mapping designs to ASICs is studied with emphasis on practicalities such as trading chip area, delays, power, etc. to meet a specification. Emphasis is also given to areas which are used extensively in the practical work, particularly simulation, debugging and verification.

Aims

The module aims to give an overview of the processes involved in taking a concept onto a product chip. It also illustrates some of the choices available to an implementer. Finally, the practicals are intended to give some experience of the flow, the frustration and the satisfaction of making a working device.

Syllabus

The practical part of the course involves migrating the design of a moderately complex FSM into Verilog, integrating it with other parts of a system-on-chip, verifying that it operates correctly and demonstrating it working. The intention is to use a graphics drawing example design so that the final result can easily be seen on its own display.

The lectures are planned approximately as follows:

Introduction

The scale of the problem and what VLSI 'looks like', inside.

Verilog

Some revision plus some features you may not have met before.

Functional Simulation

Test harness construction and making things 'realistic'.

Debugging

What to look for and how to find it.

Tool flows

The sort of tools used to get source code into silicon and how to get the best from them.

Timing Simulation

Simulating big designs and getting sufficiently accurate results in days, not months.

Timing

Clocking, clock distribution and the perils of crossing between clock domains.

Technology

What every VLSI engineer needs to know about CMOS

Layout

Overcoming the crippling effects of reality on a nice, clean design.

Testing

Proving the device will work and then checking if it does when the silicon arrives.

Future

Silicon fabrication is still evolving rapidly. A look at some things which are going to make life (even) harder.

Teaching methods

Lectures

11

Laboratories

2 hours/week (1 hour timetabled, 1 hour independent work)

Feedback methods

Feedback is given orally in scheduled laboratories; lectures are intended to be active and discussion is encouraged.

Annotated listings and diagrams will be returned to students.

Feedback as to whether a constructed (video) system operates correctly should be apparent from simulations during the work's progression and will definitely visible in the final realisation.

Study hours

  • Assessment written exam (2 hours)
  • Lectures (12 hours)
  • Practical classes & workshops (12 hours)

Employability skills

  • Analytical skills
  • Innovation/creativity
  • Problem solving
  • Other

Learning outcomes

Programme outcomeUnit learning outcomesAssessment
A2 B1 B2 B3 C1 C5 C6 C9 D4Have implemented a substantial hardware unit.
  • Lab assessment
  • Examination
A3 B1 B2 C1 C6 D5Have integrated that unit into a larger hardware design.
  • Examination
  • Lab assessment
C5 C6Have developed greater understanding of HDLs.
  • Examination
B2 C4 D4Be a more confident digital hardware designer.
  • Examination

Reading list

COMP32211 does not have a specified reading list.

Additional notes

Course unit materials

Links to course unit teaching materials can be found on the School of Computer Science website for current students.