COMP12111 Fundamentals of Computer Engineering syllabus 2020-2021
This course introduces digital logic and its application in computer organisation and design.
The major emphasis is on practical design work. In the laboratory state-of-the-art computer-aided design tools are used to support the design of digital hardware systems. Students' designs are simulated and then implemented on in-house programmable gate array boards.
The lectures initially support the laboratories but progress to a wider overview of the design and interaction of computer hardware systems. Ultimately a complete - if simple - computer is described.
This course unit detail provides the framework for delivery in 20/21 and may be subject to change due to any additional Covid-19 impact. Please see Blackboard / course unit related emails for any further updates.
The main aim of this course is to give students a basic understanding of the hardware which underpins computing systems.
Further aims include:
- Introduction to basic logic and logic gates
- Partitioning of simple systems into combinatorial and sequential blocks
- To introduce basic CAD tools to aid in the design of a basic computer system
- To provide an overview of hardware description languages with particular emphasis on Verilog
- Introducing logic level implementation of a simple processor
- Discussion of how computer systems interact with memory and I/O devices
Course unit overview and introduction to the lab.
2.Introduction to logic
Digital signals, data representation, Boolean logic and functions, De Morgan’s theorem, logic gates, multiplexers, binary arithmetic, abstraction & hierarchy, clocks, sequential systems.
3.Computer Aided Design (CAD)
Complexity and design – the need for CAD tools, testing & simulation,
4.Hardware description languages - Verilog
Introduction to Verilog, Verilog assignments, the always block and sensitivity list, design of combinatorial and sequential circuits in Verilog.
5.Register Transfer Level (RTL) Design
The synchronous paradigm, introduction to sequential systems, RTL view of design, the register, datapath and control,
6.Finite State Machines (FSM)
Introduction to the FSM, state transition diagrams, state transition tables, implementation in Verilog.
Overview of the three-box model: CPU, Memory, I/O, processor operation, instruction execution – fetch/decode/execute – and the sequencing of actions, program counter, instruction register, condition code register.
8.The Manchester University 0 (MU0) Processor
Introduction to MU0 - instruction set and operation, arithmetic logic unit (ALU) design and critical path, design of the MU0 datapath and control.
Von Neumann and Harvard architecture, tri-state buffers and bidirectional buses, memory map, address decoding schemes – one dimensional and two-dimensional, memory architectures, address decoders.
Memory hierarchy and relationship between speed, cost and capacity, cache, SRAM, DRAM, ROM, Flash, HDD and optical storage.
11.Input and output
The I/O interface, communication and I/O devices, parallel and serial communications, polling and interrupts, implementing and servicing interrupts, direct memory access, universal serial bus (USB),
12.Examples of I/O
Examples of input peripheral, output peripheral and communications using optical fibres.
22 in total, 2 per week
20 hours in total, 10 2-hour sessions
Midterm test which will count towards 10% of the exam mark (10% overall)
Feedback is provided by the automated marking of submitted work. In addition, face-to-face demonstration of submitted work is undertaken for each exercise, where a demonstrator provides one-to-one feedback on the work submitted.
- Assessment written exam (2 hours)
- Lectures (44 hours)
- Practical classes & workshops (20 hours)
- Analytical skills
- Problem solving
On successful completion of this unit, a student will be able to:
- Convert between different number bases and perform the process of binary addition and subtraction.
- Manipulate Boolean expressions and illustrate their implementation using simple combinatorial circuits.
- Compare approaches to digital design and produce simple testing strategies for evaluating the correctness of designs.
- Identify the key features of the Verilog language and use it to design simple combinatorial and sequential circuits.
- Explain the operation of sequential system and create simple finite state machine designs.
- Identify the key functional components of a processor and explain how they work together to execute instructions.
- Distinguish between the various components of the memory hierarchy and contrast their different features and methods of operation.
- Explain the role of input and output in a modern computer system and discuss the key functional elements of the peripheral interface.
- Distinguish between different approaches for requesting data transfer between the CPU and I/O and explain their operation.
- Give examples of simple input/output devices and discuss their operation.
|Principles of computer hardware||Clements, Alan, 1948-||9780199273133||Oxford University||2006.|
|Quick start guide to Verilog||LaMeres, Brock J.,||9783030105525; 3030105520; 9783030105532; 3030105539||Springer|||
|Digital design.||Mano,M. Morris,||9780132774208||Prentice Hall||2011|
|Fundamentals of logic design||Roth, Charles H., 1932-||9781133628484||Nelson Engineering||2013.|
|The Verilog hardware description language /||Thomas, D. E.||9780387849300 (hbk.) :||Springer||c2008.|
|Digital design : with RTL design, VHDL, and Verilog||Vahid, Frank.||9780470531082||Wiley||c2011.|
|Computer systems architecture : a networking approach||Williams, Rob.||0201648598||Addison-Wesley||c2001.|
|Computer systems architecture : a networking approach||Williams, Rob, 1948-||9780321340795||Pearson Prentice Hall||2006.|
Course unit materials
Links to course unit teaching materials can be found on the School of Computer Science website for current students.