This is an archived syllabus from 2021-2022
COMP22111 Processor Microarchitecture syllabus 2021-2022
COMP22111 Processor Microarchitecture
Enrolled students: 118
Course leader: Paul Nutter
Additional staff: view all staff
- Pre-Requisite (Compulsory): COMP12111
- Students who are not from the School of Computer Science must have permission from both Computer Science and their home School to enrol.
- 50% Written exam
- 50% Coursework
|Sem 1 w1-5,7-12||Lecture||Engineering Building B 2B.020 Blended Theatre 2||Mon||15:00 - 16:00||-|
|Sem 1 w3-5,7-12||Lab||Tootill (0 + 1)||Tue||11:00 - 13:00||-|
|Sem 1 w3-5,7-12||Lab||Tootill (0 + 1)||Mon||16:00 - 18:00||-|
This course unit aims to reinforce and extend digital hardware development skills which are introduced in the first year. It aims to give students a view of the role of the digital designer, taking an idea and implementing it in silicon. The course unit looks at different architectures and computing paradigms, finishing with a discussion of what technologies may, in the future, replace silicon as the building block of the processor..
The module aims to give a view of the role of a digital hardware designer, taking an idea and implementing it as a silicon chip. A processor is a representative example of logic used in today's chips, also giving further insight into how computers actually work.
Having completed the module you should have developed the confidence to be able to take a concept and realise it in hardware. You should also appreciate the test and verification processes involved so that your chips work efficiently and reliably ... first time, every time!
Overview, introduction to the lab, approaches to design and the management of complexity
Designing complex systems, RISC v CISC, Stump specification and addressing schemes, Stump ISA
Verilog & Testing
Verilog recap and new features - tasks, functions and structural Verilog. Verification, validation and testing - the testbench.
Sequential systems design
The processor as a sequential system, datapath and control, register transfer level (RTL) design, Mealy and Moore finite state machines.
Designing and Implementing Processors
Implementation of processors from the ISA, architectural design, RTL design, Verilog implementation.
Introduction to CMOS
Basic electronics, logic gates in CMOS and design considerations.
Specialised Processing Architectures
Examining DSPs, floating-point (and other) coprocessors, SIMD and vector extensions as well as VLIW.
Basic building blocks, including register files, FIFOs, RAMs, CAMs, arithmetic circuits (adders and multipliers) and shifters.
FPGA mode of operation and its spatial programming model as well as application examples.
Hardware Design Examples
Investigating a few circuits (e.g., digital filters, sorters, PWMs) and understanding their design factors.
Standard Cell design methodology, PLA, Multiplexer, look-up table technology.
This unit will be delivered using a blended approach to learning. Self-study materials will be made available in the form of written notes, videos and self-assessment quizzes in Blackboard that allow you to check your understanding of the material provided. Each week there will be a live session which will focus on covering design examples and/or providing support and general feedback on laboratory exercises. These sessions will be, where possible, interactive.
Laboratory exercises are supported by weekly drop-in sessions (from week 3), where students can get help and support.
Students are expected to spend (approximately):
2 hours per week working on the online asynchronous material (22 hours in total).
5 hours per week on the laboratory exercises (40 hours in total).
1 hour per week synchronous lecture (11 hours in total).
Feedback is provided via formative quizzes in Blackboard and via automated marking for laboratory work, with feedback on work being delivered by email.
- Assessment written exam (2 hours)
- Lectures (11 hours)
- Analytical skills
- Problem solving
On successful completion of this unit, a student will be able to:
- Explore the operation of sequential systems and design and implement systems consisting of datapath and control elements.
- Apply design methodologies to aid in the design of complex digital systems.
- Discuss key features of the Verilog language and be able to implement and test sequential digital systems at the register transfer level (RTL) of the design hierarchy.
- Discuss the role of the instruction set architecture in influencing the design of the processor, identifying key functional components of a design and explaining how they work together to execute instructions.
- Explain the stages of processor design starting from the Instruction Set Architecture through to implementation in Verilog.
- Explain the design and operation of simple logic functions in CMOS logic and discuss the issues associated with CMOS.
- Analyse how design factors such as scaling, monetary cost, performance and power consumption impact VLSI designs.
- Describe examples of specialised compute units such as coprocessors, floating-point units and vector extensions and identify their relative advantages and disadvantages.
- Compare different processor technologies, such as CPU, GPU and FPGA, with respect to different application domains, and discuss future industry trends beyond traditional CMOS scaling for post-Moore computing.
- Reveal important parts of the CAD tool stack including logic synthesis and test as well as placement and routing algorithms.
|ARM system-on-chip architecture /||Furber, Stephen B.||0201675196||Addison-Wesley, an imprint of Pearson Education,||2000.|
|Principles of computer hardware||Clements, Alan, 1948-||9780199273133||Oxford University||2006.|
|The Verilog hardware description language /||Thomas, D. E.||9780387849300 (hbk.) :||Springer||c2008.|
Course unit materials
Links to course unit teaching materials can be found on the School of Computer Science website for current students.