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Current postgraduate taught students

COMP61221: Mobile Systems (2010-2011)

This is an archived syllabus from 2010-2011

Mobile Systems
Level: 6
Credit rating: 15
Pre-requisites: None.
Co-requisites: None.
Duration: 80 hours: on-line self-study material supported by unsupervised practical exercises and seminar sessions
Lectures: 1 day per week (5 weeks), but no scheduled slot - this is a self-study course.
Examples classes: Seminar sessions will be arranged during each of the 5 weeks to discuss problems, progress, etc.
Labs: The practical sessions provide hands-on experience with the ARM Developer Suite.
Lecturers: Steve Furber
Course lecturer: Steve Furber

Additional staff: view all staff
Sem 1 P2 Lecture LF17 Wed 13:00 - 15:00 -
Assessment Breakdown
Exam: 33%
Coursework: 67%
Lab: 0%

Themes to which this unit belongs
  • Mobile Computing


This course covers the design of low-power embedded systems based around the ARM 32-bit microprocessor core. It will be taught primarily through self-study on-line material, supported by seminars and practical exercises.

The course does not assume previous experience in logic design, but is concerned with the hardware and low-level software of mobile systems, so some interest in microprocessor architecture and System-on-Chip developments is expected.


Computing is becoming increasingly mobile, both in recognisable forms such as lap-top computers and in forms where the computing function is concealed such as digital mobile telephones. Mobile computing increases significantly the importance of minimising the power consumed by the system as excessive consumption directly compromises battery life. The aim of this course is to introduce students to the practical aspects of engineering high-performance computer systems where power consumption is a major consideration at every stage of the design. The course is heavily based around the ARM 32-bit RISC microprocessor, a world-leading processor for power-sensitive applications, and covers many aspects of designing power-efficient systems around ARM cores.

Programme outcomeUnit learning outcomesAssessment
A1An understanding of the principles of the ARM and Thumb instruction sets and their practical use.
  • Individual coursework
  • Examination
A1An understanding of the principles of low-power RISC processor design.
  • Examination
A2 B2 C1An insight into the design of memory hierarchies for power-efficient systems, and an ability to apply a systematic methodology to memory hierarchy design.
  • Individual coursework
  • Examination
A2 B3 C1An overview of the system-level issues involved in designing a particular power-sensitive application.
  • Examination
  • Individual coursework
D4An ability to write clear and concise reports on matters relating to low-power design.
  • Individual coursework


Basics of processor design.
Processor design trade-offs.
The ARM and Thumb instruction sets in outline.
The ARM instruction set in detail.
Exceptions and special instructions.
The Thumb instruction set in detail.
ARM integer cores.
Memory hierarchy.
The ARM memory management and memory protection units.
System development.
On-chip buses.
On-chip debug.

Special Resources Needed to complete the module

The ARM CBT (computer-based training package) contains the basic course material - this is available on-line.
Access to the ARM Developer Suite (ADS) is required for the practicals and the post-course work. This runs on Windows PCs and is available on School machines. We can provide remote access to suitable School machines. Alternatively, a (limited-time) demo version may be available for part-time students wishing to take the course.

Reading List

1. Access to the course book (Furber, "ARM System-on-Chip Architecture") is highly desirable - see full details below.

2. Full course material, including the laboratory manual, are supplied online.

Core Text
Title: ARM system-on-chip architecture (2nd edition)
Author: Furber, Steve
ISBN: 0201675196
Publisher: Addison Wesley
Edition: 2nd
Year: 2000