COMP22111: VLSI System Design (2011-2012)
The course gives an understanding of how integrated circuit technology is used today to implement complex electronic systems as silicon chips. VLSI circuits play an increasingly important role in computer systems; it is therefore of benefit to a wide range of computer scientists to know how this technology can be exploited and to be aware of the many factors involved in the design of a VLSI chip.
|Programme outcome||Unit learning outcomes||Assessment|
|A3||Have a knowledge and understanding of the process of designing VLSI chips.|
|A3||Have an understanding of the different design stages and representations of a VLSI circuit.|
|A3||Have an understanding of the major architectural and performance factors to be considered in the global design of a large integrated circuit.|
|A3||Have an understanding and appreciation of the problems arising out of the rapid change of technology and increase in design complexity.|
|A3 B1 B2 B3 C1 C2 C5 C6 D4 D5||Be able to design a 16-bit RISC processor at the upper levels of the design process, and have experience of the tools to test and debug the design.|
|A3 C5 C6||Have a knowledge and understanding of industry-standard hardware description languages.|
Scales of integration, CMOS versus other technologies, VLSI trends, overview of top down design hierarchy, VLSI design route.
System Specification of the STUMP (2)
RISC versus CISC, load/store architecture, non-pipelined behaviour, instruction set.
Top-Level Behavioural Description (1)
Architectural Design of STUMP (1)
Block partitioning, datapath occupancy.
Register Transfer Level Design (1)
Formation of STUMP datapath.
Verilog Hardware Description Language (4)
Principles, structure, features and syntax, scheduling, test bench.
Basic electronics, resistance, capacitance, MOS transistors and gates.
VLSI structures, standard cells, macrocells, ASICs and FPGAs.
Timing and Clocking (1)
Clock generation, buffering, and distribution; crossing clock domains.
Verification and Testing (1)
Modelling and testing designs at different levels of abstraction, yields and testing chips, test coverage.
Design Flows (1)
CAD tools from concept to (working) chip.